The effect of drain bias stress on the instability of turned-OFF amorphous HfInZnO thin-film transistors under light irradiation

A comprehensive study was done regarding stabilities under simultaneous stress of light and negative gate bias (V G)/positive drain bias (V D) in amorphous hafnium-indium zinc-oxide thin-film transistors. Negative threshold voltage (V th) shift was observed in transfer characteristics after the stress. Through the consecutive stressesof (V G =5V,V D =15V,andV S =0V)and(VG =5V, VD = 0 V, and VS = 15 V) under light illumination, it is found that the negativeVth shift is affected only byVG, becausethe drain current is determined by source-side energy barrier though drain-side energy band is locally lowered by VDinduced drain-side trapped holes. Furthermore, the drainside trapped holes increaseON-current by reducing channel resistance after channel accumulation.Gate-to-drain capacitance (CGD) was measured before/after the (VG = 5 V, VD = 15 V, and VS = 0 V) stress to clarify the presence and distribution of the drain-side trapped holes. From CGD stretching out after the stress, it is revealed that the trapped holes introduce an additional capacitance by responding to the accumulated electrons and the capacitance is distributed according to the vertical electric field distribution of the stress.