Abstract
In order to verify the effects of large gate-to-drain capacitance (Cgd coupled with low tunneling current on the switching characteristics of tunnel field-effect transistor (TFET) inverters, TFET and MOSFET inverter circuits with equalized saturation current (Isat and Cgd levels are simulated with the help of mixed-mode device and circuit simulations. From the simulation results, it is revealed that additional mechanisms also degrade the pre-shoot and falling/rising delay of the output voltage (Vout as well as the low tunneling current and large Cgd inherent in TFETs. A one-directional current flow due to the asymmetric polarity of the source/drain and the superlinear onset of the output characteristics along with an ambipolar current are found to be among the main causes of the pre-shoot and the falling/rising delay, respectively.
Original language | English |
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Pages (from-to) | 7134-7139 |
Number of pages | 6 |
Journal | Journal of Nanoscience and Nanotechnology |
Volume | 17 |
Issue number | 10 |
DOIs | |
State | Published - Oct 2017 |
Bibliographical note
Publisher Copyright:Copyright © 2017 American Scientific Publishers All rights reserved
Keywords
- One-Directional Current of TFET
- Superlinear Onset of TFET
- Switching Characteristic of TFET
- TFET