Speed control for a hardware based H.264/AVC encoder

Eun Rhee Chae; Jin Su Jung; Hyuk Jae Lee

doi:10.1109/SOCC.2008.4641512

Speed control for a hardware based H.264/AVC encoder

Eun Rhee Chae, Jin Su Jung, Hyuk Jae Lee

Seoul National University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

This paper proposes a novel processing time control algorithm for a hardware-based H.264/AVC encoder. In the proposed speed control, a macroblock processing time budget is allocated adaptively according to the processing time of the other blocks. Then, twelve complexity levels are defined to provide various combinations of processing time and compression efficiency. For a given time budget, the algorithm selects the proper complexity level that compresses most efficiently among the levels that meet the time budget. Experimental results show that real-time processing is achieved by the speed control with negligible quality degradation while between 31.2% and 50% macroblocks violates its time budget without speed control.

Original language	English
Title of host publication	2008 IEEE International SOC Conference, SOCC
Pages	205-208
Number of pages	4
DOIs	https://doi.org/10.1109/SOCC.2008.4641512
State	Published - 2008
Externally published	Yes
Event	2008 IEEE International SOC Conference, SOCC - Newport Beach, CA, United States Duration: 17 Sep 2008 → 20 Sep 2008

Publication series

Name	2008 IEEE International SOC Conference, SOCC

Conference

Conference	2008 IEEE International SOC Conference, SOCC
Country/Territory	United States
City	Newport Beach, CA
Period	17/09/08 → 20/09/08

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10.1109/SOCC.2008.4641512

Cite this

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title = "Speed control for a hardware based H.264/AVC encoder",

abstract = "This paper proposes a novel processing time control algorithm for a hardware-based H.264/AVC encoder. In the proposed speed control, a macroblock processing time budget is allocated adaptively according to the processing time of the other blocks. Then, twelve complexity levels are defined to provide various combinations of processing time and compression efficiency. For a given time budget, the algorithm selects the proper complexity level that compresses most efficiently among the levels that meet the time budget. Experimental results show that real-time processing is achieved by the speed control with negligible quality degradation while between 31.2% and 50% macroblocks violates its time budget without speed control.",

author = "Chae, {Eun Rhee} and Jung, {Jin Su} and Lee, {Hyuk Jae}",

year = "2008",

doi = "10.1109/SOCC.2008.4641512",

language = "English",

isbn = "9781424425969",

series = "2008 IEEE International SOC Conference, SOCC",

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note = "2008 IEEE International SOC Conference, SOCC ; Conference date: 17-09-2008 Through 20-09-2008",

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AU - Chae, Eun Rhee

AU - Jung, Jin Su

AU - Lee, Hyuk Jae

PY - 2008

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N2 - This paper proposes a novel processing time control algorithm for a hardware-based H.264/AVC encoder. In the proposed speed control, a macroblock processing time budget is allocated adaptively according to the processing time of the other blocks. Then, twelve complexity levels are defined to provide various combinations of processing time and compression efficiency. For a given time budget, the algorithm selects the proper complexity level that compresses most efficiently among the levels that meet the time budget. Experimental results show that real-time processing is achieved by the speed control with negligible quality degradation while between 31.2% and 50% macroblocks violates its time budget without speed control.

AB - This paper proposes a novel processing time control algorithm for a hardware-based H.264/AVC encoder. In the proposed speed control, a macroblock processing time budget is allocated adaptively according to the processing time of the other blocks. Then, twelve complexity levels are defined to provide various combinations of processing time and compression efficiency. For a given time budget, the algorithm selects the proper complexity level that compresses most efficiently among the levels that meet the time budget. Experimental results show that real-time processing is achieved by the speed control with negligible quality degradation while between 31.2% and 50% macroblocks violates its time budget without speed control.

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DO - 10.1109/SOCC.2008.4641512

M3 - Conference contribution

AN - SCOPUS:67650254772

SN - 9781424425969

T3 - 2008 IEEE International SOC Conference, SOCC

SP - 205

EP - 208

BT - 2008 IEEE International SOC Conference, SOCC

T2 - 2008 IEEE International SOC Conference, SOCC

Y2 - 17 September 2008 through 20 September 2008

ER -

Speed control for a hardware based H.264/AVC encoder

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