Novel Dual Liner Process for Side-Shielded Forksheet Device with Superior Design Margin

Munhyeon Kim; Kitae Lee; Sihyun Kim; Jong Ho Lee; Byung Gook Park; Daewoong Kwon

doi:10.1109/TED.2022.3156957

Novel Dual Liner Process for Side-Shielded Forksheet Device with Superior Design Margin

Munhyeon Kim, Kitae Lee, Sihyun Kim, Jong Ho Lee, Byung Gook Park, Daewoong Kwon

Seoul National University

Research output: Contribution to journal › Article › peer-review

Abstract

In this article, for the first time, we proposed the side-shielded forksheet (S-FS) device to sustain extreme device scaling and to expand device design margins. Through the process simulations calibrated based on transmission electron microscopy (TEM) dimensions of the process integration modules, it is verified that n/p-type nanosheet (NS)-shaped stacked channel devices are physically isolated in the S-FS by the dielectric wall formed by the proposed dual liner process scheme (DLS). In addition, distributed correlation is rigorously analyzed by 3-D technology computer aided design (TCAD) device simulations with precisely calibrated models. As a result, it is revealed that the S-FS shows the superior electrical characteristics and design margin compared to the conventional forksheet (C-FS) device when structural variation and work function (WF) fluctuation are considered in extremely scaled devices.

Original language	English
Pages (from-to)	2232-2235
Number of pages	4
Journal	IEEE Transactions on Electron Devices
Volume	69
Issue number	5
DOIs	https://doi.org/10.1109/TED.2022.3156957
State	Published - 1 May 2022

Bibliographical note

Publisher Copyright:
© 1963-2012 IEEE.

Keywords

device design margin
forksheet device
stacked nanosheet (NS)

Access to Document

10.1109/TED.2022.3156957

Cite this

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title = "Novel Dual Liner Process for Side-Shielded Forksheet Device with Superior Design Margin",

abstract = "In this article, for the first time, we proposed the side-shielded forksheet (S-FS) device to sustain extreme device scaling and to expand device design margins. Through the process simulations calibrated based on transmission electron microscopy (TEM) dimensions of the process integration modules, it is verified that n/p-type nanosheet (NS)-shaped stacked channel devices are physically isolated in the S-FS by the dielectric wall formed by the proposed dual liner process scheme (DLS). In addition, distributed correlation is rigorously analyzed by 3-D technology computer aided design (TCAD) device simulations with precisely calibrated models. As a result, it is revealed that the S-FS shows the superior electrical characteristics and design margin compared to the conventional forksheet (C-FS) device when structural variation and work function (WF) fluctuation are considered in extremely scaled devices.",

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author = "Munhyeon Kim and Kitae Lee and Sihyun Kim and Lee, {Jong Ho} and Park, {Byung Gook} and Daewoong Kwon",

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AU - Kwon, Daewoong

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Novel Dual Liner Process for Side-Shielded Forksheet Device with Superior Design Margin

Abstract

Bibliographical note

Keywords

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