Near Threshold Capacitance Matching in a Negative Capacitance FET with 1 nm Effective Oxide Thickness Gate Stack

Daewoong Kwon; Suraj Cheema; Yen Kai Lin; Yu Hung Liao; Korok Chatterjee; Ava J. Tan; Chenming Hu; Sayeef Salahuddin

doi:10.1109/LED.2019.2951705

Near Threshold Capacitance Matching in a Negative Capacitance FET with 1 nm Effective Oxide Thickness Gate Stack

Daewoong Kwon, Suraj Cheema, Yen Kai Lin, Yu Hung Liao, Korok Chatterjee, Ava J. Tan, Chenming Hu, Sayeef Salahuddin

University of California at Berkeley

Research output: Contribution to journal › Article › peer-review

34 Scopus citations

Abstract

We report Negative Capacitance nFETs with a 1 nm effective oxide thickness (EOT) gate stack. Experimental measurements show a clear steepening of the slope of the I_D-V_G characteristic in the weak inversion regime, indicating that a capacitance matching takes place there. This leads to non-linear behavior of the current in the log scale, which is not observed in conventional devices. Such steepening in the weak inversion regime leads to a significant increase in the achievable current at a constant V_DD. At L_G = 50 nm, our transistors show a larger than 2X increase in the ON current.

Original language	English
Article number	8891680
Pages (from-to)	179-182
Number of pages	4
Journal	IEEE Electron Device Letters
Volume	41
Issue number	1
DOIs	https://doi.org/10.1109/LED.2019.2951705
State	Published - Jan 2020

Bibliographical note

Publisher Copyright:
© 2019 IEEE.

Keywords

Ultrathin ferroelectric
negative capacitance FET

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title = "Near Threshold Capacitance Matching in a Negative Capacitance FET with 1 nm Effective Oxide Thickness Gate Stack",

abstract = "We report Negative Capacitance nFETs with a 1 nm effective oxide thickness (EOT) gate stack. Experimental measurements show a clear steepening of the slope of the ID-VG characteristic in the weak inversion regime, indicating that a capacitance matching takes place there. This leads to non-linear behavior of the current in the log scale, which is not observed in conventional devices. Such steepening in the weak inversion regime leads to a significant increase in the achievable current at a constant VDD. At LG = 50 nm, our transistors show a larger than 2X increase in the ON current.",

keywords = "Ultrathin ferroelectric, negative capacitance FET",

author = "Daewoong Kwon and Suraj Cheema and Lin, {Yen Kai} and Liao, {Yu Hung} and Korok Chatterjee and Tan, {Ava J.} and Chenming Hu and Sayeef Salahuddin",

note = "Publisher Copyright: {\textcopyright} 2019 IEEE.",

year = "2020",

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AU - Kwon, Daewoong

AU - Cheema, Suraj

AU - Lin, Yen Kai

AU - Liao, Yu Hung

AU - Chatterjee, Korok

AU - Tan, Ava J.

AU - Hu, Chenming

AU - Salahuddin, Sayeef

PY - 2020/1

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N2 - We report Negative Capacitance nFETs with a 1 nm effective oxide thickness (EOT) gate stack. Experimental measurements show a clear steepening of the slope of the ID-VG characteristic in the weak inversion regime, indicating that a capacitance matching takes place there. This leads to non-linear behavior of the current in the log scale, which is not observed in conventional devices. Such steepening in the weak inversion regime leads to a significant increase in the achievable current at a constant VDD. At LG = 50 nm, our transistors show a larger than 2X increase in the ON current.

AB - We report Negative Capacitance nFETs with a 1 nm effective oxide thickness (EOT) gate stack. Experimental measurements show a clear steepening of the slope of the ID-VG characteristic in the weak inversion regime, indicating that a capacitance matching takes place there. This leads to non-linear behavior of the current in the log scale, which is not observed in conventional devices. Such steepening in the weak inversion regime leads to a significant increase in the achievable current at a constant VDD. At LG = 50 nm, our transistors show a larger than 2X increase in the ON current.

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KW - negative capacitance FET

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ER -

Near Threshold Capacitance Matching in a Negative Capacitance FET with 1 nm Effective Oxide Thickness Gate Stack

Abstract

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