Multi-Level Threshold Voltage Setting Method of String Select Transistors for Layer Selection in Channel Stacked NAND Flash Memory

Dae Woong Kwon; Wandong Kim; Do Bin Kim; Sang Ho Lee; Joo Yun Seo; Myung Hyun Baek; Ji Ho Park; Eunseok Choi; Gyu Seong Cho; Sung Kye Park; Byung Gook Park

doi:10.1109/LED.2015.2491367

Multi-Level Threshold Voltage Setting Method of String Select Transistors for Layer Selection in Channel Stacked NAND Flash Memory

Dae Woong Kwon, Wandong Kim, Do Bin Kim, Sang Ho Lee, Joo Yun Seo, Myung Hyun Baek, Ji Ho Park, Eunseok Choi, Gyu Seong Cho, Sung Kye Park, Byung Gook Park

Research output: Contribution to journal › Article › peer-review

10 Scopus citations

Abstract

In this letter, we propose a simplified channel-stacked array with a layer selection by multi-level operation (SLSM) and a new string select transistors (SSTs) threshold voltage (V_th) setting method that all the SSTs on each layer are set to targeted the V_th values simultaneously by one erase operation. To verify the validity of the new method in SLSM, TCAD simulations are performed, and a fabricated pseudo SLSM is measured. It is verified that the V_th values of SSTs are set to the targeted V_th values by the new method. Moreover, memory operations are examined in the fabricated structure after setting the V_th values of all the SSTs by the new method. As a result, stable memory operations are obtained successfully without the interference between stacked layers.

Original language	English
Article number	7307962
Pages (from-to)	1318-1320
Number of pages	3
Journal	IEEE Electron Device Letters
Volume	36
Issue number	12
DOIs	https://doi.org/10.1109/LED.2015.2491367
State	Published - Dec 2015

Bibliographical note

Publisher Copyright:
© 2015 IEEE.

Keywords

3D NAND flash memory
LSM
SST threshold voltage setting
channel stacked NAND flash memory
stacked layer selection

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10.1109/LED.2015.2491367

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Kwon, D. W., Kim, W., Kim, D. B., Lee, S. H., Seo, J. Y., Baek, M. H., Park, J. H., Choi, E., Cho, G. S., Park, S. K., & Park, B. G. (2015). Multi-Level Threshold Voltage Setting Method of String Select Transistors for Layer Selection in Channel Stacked NAND Flash Memory. IEEE Electron Device Letters, 36(12), 1318-1320. Article 7307962. https://doi.org/10.1109/LED.2015.2491367

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title = "Multi-Level Threshold Voltage Setting Method of String Select Transistors for Layer Selection in Channel Stacked NAND Flash Memory",

abstract = "In this letter, we propose a simplified channel-stacked array with a layer selection by multi-level operation (SLSM) and a new string select transistors (SSTs) threshold voltage (Vth) setting method that all the SSTs on each layer are set to targeted the Vth values simultaneously by one erase operation. To verify the validity of the new method in SLSM, TCAD simulations are performed, and a fabricated pseudo SLSM is measured. It is verified that the Vth values of SSTs are set to the targeted Vth values by the new method. Moreover, memory operations are examined in the fabricated structure after setting the Vth values of all the SSTs by the new method. As a result, stable memory operations are obtained successfully without the interference between stacked layers.",

keywords = "3D NAND flash memory, LSM, SST threshold voltage setting, channel stacked NAND flash memory, stacked layer selection",

author = "Kwon, {Dae Woong} and Wandong Kim and Kim, {Do Bin} and Lee, {Sang Ho} and Seo, {Joo Yun} and Baek, {Myung Hyun} and Park, {Ji Ho} and Eunseok Choi and Cho, {Gyu Seong} and Park, {Sung Kye} and Park, {Byung Gook}",

note = "Publisher Copyright: {\textcopyright} 2015 IEEE.",

year = "2015",

month = dec,

doi = "10.1109/LED.2015.2491367",

language = "English",

volume = "36",

pages = "1318--1320",

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T1 - Multi-Level Threshold Voltage Setting Method of String Select Transistors for Layer Selection in Channel Stacked NAND Flash Memory

AU - Kwon, Dae Woong

AU - Kim, Wandong

AU - Kim, Do Bin

AU - Lee, Sang Ho

AU - Seo, Joo Yun

AU - Baek, Myung Hyun

AU - Park, Ji Ho

AU - Choi, Eunseok

AU - Cho, Gyu Seong

AU - Park, Sung Kye

AU - Park, Byung Gook

PY - 2015/12

Y1 - 2015/12

N2 - In this letter, we propose a simplified channel-stacked array with a layer selection by multi-level operation (SLSM) and a new string select transistors (SSTs) threshold voltage (Vth) setting method that all the SSTs on each layer are set to targeted the Vth values simultaneously by one erase operation. To verify the validity of the new method in SLSM, TCAD simulations are performed, and a fabricated pseudo SLSM is measured. It is verified that the Vth values of SSTs are set to the targeted Vth values by the new method. Moreover, memory operations are examined in the fabricated structure after setting the Vth values of all the SSTs by the new method. As a result, stable memory operations are obtained successfully without the interference between stacked layers.

AB - In this letter, we propose a simplified channel-stacked array with a layer selection by multi-level operation (SLSM) and a new string select transistors (SSTs) threshold voltage (Vth) setting method that all the SSTs on each layer are set to targeted the Vth values simultaneously by one erase operation. To verify the validity of the new method in SLSM, TCAD simulations are performed, and a fabricated pseudo SLSM is measured. It is verified that the Vth values of SSTs are set to the targeted Vth values by the new method. Moreover, memory operations are examined in the fabricated structure after setting the Vth values of all the SSTs by the new method. As a result, stable memory operations are obtained successfully without the interference between stacked layers.

KW - 3D NAND flash memory

KW - LSM

KW - SST threshold voltage setting

KW - channel stacked NAND flash memory

KW - stacked layer selection

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DO - 10.1109/LED.2015.2491367

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JF - IEEE Electron Device Letters

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M1 - 7307962

ER -

Multi-Level Threshold Voltage Setting Method of String Select Transistors for Layer Selection in Channel Stacked NAND Flash Memory

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