Abstract
Electron trapping in high-κ gate dielectrics under constant voltage stress is investigated. It is suggested that the electron trapping occurs through a two-step process: resonant tunneling of the injected electron into the preexisting defects (fast trapping) and thermally activated migration of trapped electrons to unoccupied traps (slow trapping). Characteristics of the electron traps extracted based on the proposed model are in good agreement with the calculated properties of the negatively charged oxygen vacancies. The model successfully describes low-temperature threshold voltage instability in NMOS transistors with HfO2/TiN gate stacks.
Original language | English |
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Pages (from-to) | 138-145 |
Number of pages | 8 |
Journal | IEEE Transactions on Device and Materials Reliability |
Volume | 7 |
Issue number | 1 |
DOIs | |
State | Published - Mar 2007 |
Externally published | Yes |
Keywords
- Electron trapping
- High-κ dielectrics
- Threshold voltage instability