@inproceedings{65f38e72cca44be99414983825a756c1,
title = "High-speed low-complexity Reed-Solomon decoder using pipelined Berlekamp-Massey algorithm",
abstract = "This paper presents a high-speed low-complexity pipelined Reed-Solomon (RS) decoder using pipelined reformulated inversionless Berlekamp-Massey (pRiBM) algorithm. Also, this paper offers technique which is about efficient method of pipelining at the RS decoders. This architecture uses pipelined Galois-Field (GF) multipliers in Syndrome computation block, key equation solver (KES) block, Forney and Chien search blocks so as to enhance clock frequency. A high-speed pipelined RS decoder based on the pRiBM algorithm has been designed and implemented with IBM 90-nm CMOS standard cell technology in a supply voltage of 1.2 V. The proposed RS decoder operates at a clock frequency of 690 MHz and has a throughput of 5.52 Gb/s. The proposed architecture requires approximately 18% fewer gate counts than architecture based on the pipelined degree- computationless modified Euclidean (pDCME) algorithm [5].",
keywords = "Berlekamp-Massey algorithm, Component, Key equation solver, Pipelined, Reed-Solomon codes, Syndrome, VLSI",
author = "Park, {Jeong In} and Kihoon Lee and Choi, {Chang Seok} and Hanho Lee",
year = "2009",
doi = "10.1109/SOCDC.2009.5423927",
language = "English",
isbn = "9781424450343",
series = "2009 International SoC Design Conference, ISOCC 2009",
pages = "452--455",
booktitle = "2009 International SoC Design Conference, ISOCC 2009",
note = "2009 International SoC Design Conference, ISOCC 2009 ; Conference date: 22-11-2009 Through 24-11-2009",
}