High-speed low-complexity elliptic curve cryptographic processor

Tuy Tan Nguyen, Hanho Lee

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

In this paper, we present a novel modified algorithm and architecture to compute Elliptic Curve Cryptographic point multiplication. The proposed algorithm significantly reduces the number of point addition operations. Furthermore, the field multiplication operations are scheduled to perform simultaneously to reduce the latency. As a result, our algorithm and architecture reduce the hardware complexity compared to others, while the required time for point multiplication is kept at a reasonable value. The simulation result on Xilinx Virtex-7 FPGA shows that the proposed architecture offers an improvement in hardware complexity up to 68% and much better efficiency compared to others.

Original languageEnglish
Title of host publicationISOCC 2015 - International SoC Design Conference
Subtitle of host publicationSoC for Internet of Everything (IoE)
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages265-266
Number of pages2
ISBN (Electronic)9781467393089
DOIs
StatePublished - 8 Feb 2016
Event12th International SoC Design Conference, ISOCC 2015 - Gyeongju, Korea, Republic of
Duration: 2 Nov 20155 Nov 2015

Publication series

NameISOCC 2015 - International SoC Design Conference: SoC for Internet of Everything (IoE)

Conference

Conference12th International SoC Design Conference, ISOCC 2015
Country/TerritoryKorea, Republic of
CityGyeongju
Period2/11/155/11/15

Bibliographical note

Publisher Copyright:
© 2015 IEEE.

Keywords

  • architecture
  • bit-serial
  • elliptic curve cryptography
  • point multiplication

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