Electrical instability in high-k gate stacks: As-grown vs. generated defects

Gennadi Bersuker, Patrick Lysaght, Rino Choi

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Stress-induced changes in the high-k gate stack electrical characteristics may originate in both the Hf-based dielectric film and the SiO2-like interfacial layer, in which instability could be induced by different mechanisms. In this work, we focus on the contributions from as-grown defects and defect precursors in each of these layers, as well as stress-generated defects, under low and high voltage stress regimes. Physical data, consistent with ab initio calculations, is presented in support of proposed theoretical explanations for the mechanisms that give rise to electrical performance.

Original languageEnglish
Title of host publicationECS Transactions - Symposium on Silicon Nitride, Silicon Dioxide Thin Insulating Films, and Emerging Dielectrics
PublisherElectrochemical Society Inc.
Pages687-702
Number of pages16
Edition3
ISBN (Electronic)9781566775526
ISBN (Print)9781566775526
DOIs
StatePublished - 2007
Externally publishedYes
EventSymposium on Silicon Nitride, Silicon Dioxide Thin Insulating Films, and Emerging Dielectrics - 211th ECS Meeting - Chicago, IL, United States
Duration: 6 May 200711 May 2007

Publication series

NameECS Transactions
Number3
Volume6
ISSN (Print)1938-5862
ISSN (Electronic)1938-6737

Conference

ConferenceSymposium on Silicon Nitride, Silicon Dioxide Thin Insulating Films, and Emerging Dielectrics - 211th ECS Meeting
Country/TerritoryUnited States
CityChicago, IL
Period6/05/0711/05/07

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