An Energy-Efficient Mobile Memory I/O Interface Using Simultaneous Bidirectional Multilevel Dual-Band Signaling

Majid Jalalifar; Gyung Su Byun

doi:10.1109/TCSII.2016.2614989

An Energy-Efficient Mobile Memory I/O Interface Using Simultaneous Bidirectional Multilevel Dual-Band Signaling

Majid Jalalifar, Gyung Su Byun

Southern Methodist University

Research output: Contribution to journal › Article › peer-review

4 Scopus citations

Abstract

An energy-efficient and high-speed mobile memory interface using a novel multilevel dual-band (MDB) signaling is demonstrated. The proposed MDB memory interface that incorporates pulse amplitude modulation (PAM) and RF-band signaling enables simultaneous bidirectional data links through a shared single-ended off-chip transmission line. The PAM and RF-band carries 9.2 and 4.2 Gb/s/pin, respectively. Each RF-band and PAM transceiver consumes 12.6 and 18.4 mW at 1.2 V supply, respectively. The proposed transceiver operates at 13.4 Gb/s/pin with a power efficiency of 2.3 pJ/b/pin and achieves a bit error rate < 10^-15 with 2²³-1 PRBS over a distance of 5 cm. The prototype chip is fabricated in a 65-nm CMOS process with a total area of 0.13 mm².

Original language	English
Article number	7582423
Pages (from-to)	897-901
Number of pages	5
Journal	IEEE Transactions on Circuits and Systems II: Express Briefs
Volume	64
Issue number	8
DOIs	https://doi.org/10.1109/TCSII.2016.2614989
State	Published - Aug 2017
Externally published	Yes

Bibliographical note

Publisher Copyright:
© 2016 IEEE.

Keywords

Amplitude-shift keying (ASK)
I/O
RF-band
memory interface
pulse amplitude modulation (PAM)

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10.1109/TCSII.2016.2614989

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title = "An Energy-Efficient Mobile Memory I/O Interface Using Simultaneous Bidirectional Multilevel Dual-Band Signaling",

abstract = "An energy-efficient and high-speed mobile memory interface using a novel multilevel dual-band (MDB) signaling is demonstrated. The proposed MDB memory interface that incorporates pulse amplitude modulation (PAM) and RF-band signaling enables simultaneous bidirectional data links through a shared single-ended off-chip transmission line. The PAM and RF-band carries 9.2 and 4.2 Gb/s/pin, respectively. Each RF-band and PAM transceiver consumes 12.6 and 18.4 mW at 1.2 V supply, respectively. The proposed transceiver operates at 13.4 Gb/s/pin with a power efficiency of 2.3 pJ/b/pin and achieves a bit error rate < 10-15 with 223-1 PRBS over a distance of 5 cm. The prototype chip is fabricated in a 65-nm CMOS process with a total area of 0.13 mm2.",

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An Energy-Efficient Mobile Memory I/O Interface Using Simultaneous Bidirectional Multilevel Dual-Band Signaling

Abstract

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Keywords

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