An 8-26 Gb/s Single Loop Reference-less CDR with Unrestricted Frequency Acquisition

Hyung Wook Lee; Kyeong Min Ko; Jin Ku Kang

doi:10.1109/ISOCC53507.2021.9613875

An 8-26 Gb/s Single Loop Reference-less CDR with Unrestricted Frequency Acquisition

Hyung Wook Lee, Kyeong Min Ko, Jin Ku Kang

Inha University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Scopus citations

Abstract

This paper presents an 8-26 Gb/s single loop referenceless CDR with unrestricted frequency acquisition. The CDR circuit is designed in a 28 nm CMOS technology. A frequency detector (FD) controller and mode switch are proposed to extend the frequency capture range of the frequency detector. The phase frequency detector (PFD) with the FD controller and the mode switch has unlimited capture range as long as the target frequency is within the frequency range of the VCO. The simulation shows the proposed CDR achieves the capture range from 8 Gb/s to 26 Gb/s and the frequency acquisition time of 0.47μs.

Original language	English
Title of host publication	Proceedings - International SoC Design Conference 2021, ISOCC 2021
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	45-46
Number of pages	2
ISBN (Electronic)	9781665401746
DOIs	https://doi.org/10.1109/ISOCC53507.2021.9613875
State	Published - 2021
Event	18th International System-on-Chip Design Conference, ISOCC 2021 - Jeju Island, Korea, Republic of Duration: 6 Oct 2021 → 9 Oct 2021

Publication series

Name	Proceedings - International SoC Design Conference 2021, ISOCC 2021

Conference

Conference	18th International System-on-Chip Design Conference, ISOCC 2021
Country/Territory	Korea, Republic of
City	Jeju Island
Period	6/10/21 → 9/10/21

Bibliographical note

Publisher Copyright:
© 2021 IEEE.

Keywords

Clock and data recovery (CDR)
frequency acquisition
reference-less
single loop
wide capture range

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10.1109/ISOCC53507.2021.9613875

Cite this

Lee, H. W., Ko, K. M., & Kang, J. K. (2021). An 8-26 Gb/s Single Loop Reference-less CDR with Unrestricted Frequency Acquisition. In Proceedings - International SoC Design Conference 2021, ISOCC 2021 (pp. 45-46). (Proceedings - International SoC Design Conference 2021, ISOCC 2021). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISOCC53507.2021.9613875

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title = "An 8-26 Gb/s Single Loop Reference-less CDR with Unrestricted Frequency Acquisition",

abstract = "This paper presents an 8-26 Gb/s single loop referenceless CDR with unrestricted frequency acquisition. The CDR circuit is designed in a 28 nm CMOS technology. A frequency detector (FD) controller and mode switch are proposed to extend the frequency capture range of the frequency detector. The phase frequency detector (PFD) with the FD controller and the mode switch has unlimited capture range as long as the target frequency is within the frequency range of the VCO. The simulation shows the proposed CDR achieves the capture range from 8 Gb/s to 26 Gb/s and the frequency acquisition time of 0.47μs.",

keywords = "Clock and data recovery (CDR), frequency acquisition, reference-less, single loop, wide capture range",

author = "Lee, {Hyung Wook} and Ko, {Kyeong Min} and Kang, {Jin Ku}",

note = "Publisher Copyright: {\textcopyright} 2021 IEEE.; 18th International System-on-Chip Design Conference, ISOCC 2021 ; Conference date: 06-10-2021 Through 09-10-2021",

year = "2021",

doi = "10.1109/ISOCC53507.2021.9613875",

language = "English",

series = "Proceedings - International SoC Design Conference 2021, ISOCC 2021",

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Lee, HW, Ko, KM & Kang, JK 2021, An 8-26 Gb/s Single Loop Reference-less CDR with Unrestricted Frequency Acquisition. in Proceedings - International SoC Design Conference 2021, ISOCC 2021. Proceedings - International SoC Design Conference 2021, ISOCC 2021, Institute of Electrical and Electronics Engineers Inc., pp. 45-46, 18th International System-on-Chip Design Conference, ISOCC 2021, Jeju Island, Korea, Republic of, 6/10/21. https://doi.org/10.1109/ISOCC53507.2021.9613875

An 8-26 Gb/s Single Loop Reference-less CDR with Unrestricted Frequency Acquisition. / Lee, Hyung Wook; Ko, Kyeong Min; Kang, Jin Ku.
Proceedings - International SoC Design Conference 2021, ISOCC 2021. Institute of Electrical and Electronics Engineers Inc., 2021. p. 45-46 (Proceedings - International SoC Design Conference 2021, ISOCC 2021).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Ko, Kyeong Min

AU - Kang, Jin Ku

PY - 2021

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N2 - This paper presents an 8-26 Gb/s single loop referenceless CDR with unrestricted frequency acquisition. The CDR circuit is designed in a 28 nm CMOS technology. A frequency detector (FD) controller and mode switch are proposed to extend the frequency capture range of the frequency detector. The phase frequency detector (PFD) with the FD controller and the mode switch has unlimited capture range as long as the target frequency is within the frequency range of the VCO. The simulation shows the proposed CDR achieves the capture range from 8 Gb/s to 26 Gb/s and the frequency acquisition time of 0.47μs.

AB - This paper presents an 8-26 Gb/s single loop referenceless CDR with unrestricted frequency acquisition. The CDR circuit is designed in a 28 nm CMOS technology. A frequency detector (FD) controller and mode switch are proposed to extend the frequency capture range of the frequency detector. The phase frequency detector (PFD) with the FD controller and the mode switch has unlimited capture range as long as the target frequency is within the frequency range of the VCO. The simulation shows the proposed CDR achieves the capture range from 8 Gb/s to 26 Gb/s and the frequency acquisition time of 0.47μs.

KW - Clock and data recovery (CDR)

KW - frequency acquisition

KW - reference-less

KW - single loop

KW - wide capture range

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T3 - Proceedings - International SoC Design Conference 2021, ISOCC 2021

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BT - Proceedings - International SoC Design Conference 2021, ISOCC 2021

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 18th International System-on-Chip Design Conference, ISOCC 2021

Y2 - 6 October 2021 through 9 October 2021

ER -

An 8-26 Gb/s Single Loop Reference-less CDR with Unrestricted Frequency Acquisition

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