@inproceedings{8d0bfdab3a034e3e9cf28fc5d2c035d3,
title = "A partial self-reconfigurable adaptive FIR filter system",
abstract = "This paper presents a self-reconfigurable adaptive FIR Filter system design using dynamic partial reconfiguration, which has flexibility, power efficiency, configuration time advantage allowing dynamically inserting or removing adaptive FIR filter modules. This self-reconfigurable adaptive FIR filter is responsible for providing the best solution for realization and autonomous adaptation of FIR filters, and processes the optimal digital signal processing algorithms, which are the low-pass, band-pass and high-pass filter algorithms with various frequencies, for noise removal operations. The proposed stand-alone self-reconfigurable system using Xilinx Virtex4 FPGA and Compact-Flash memory shows the improvement of configuration time and flexibility by using the dynamic partial reconfiguration techniques.",
keywords = "Adaptive, FIR, FPGA, Filter, Self-reconfigurable",
author = "Choi, {Chang Seok} and Hanho Lee",
year = "2007",
doi = "10.1109/SIPS.2007.4387545",
language = "English",
isbn = "1424412226",
series = "IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation",
pages = "204--209",
booktitle = "2007 IEEE Workshop on Signal Processing Systems, SiPS 2007, Proceedings",
note = "2007 IEEE Workshop on Signal Processing Systems, SiPS 2007 ; Conference date: 17-10-2007 Through 19-10-2007",
}