A high-performance concatenated BCH code and its hardware architecture for 100 Gb/s long-haul optical communications

Kihoon Lee, Hanho Lee

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

This paper presents a six-iteration concatenated Bose-Chaudhuri-Hocquenghem (BCH) code and its high-speed two-parallel decoder architecture for 100 Gb/s optical communications. The proposed architecture features a very high data processing rate as well as excellent error correction capability. The proposed six-iteration concatenated BCH code structure with a block interleaving methods allows the decoder to achieve 9.19 dB net coding gain performance at 10 -15 decoder output bit error rate to compensate for serious transmission quality degradation. Also, the proposed high-speed concatenated BCH decoder architecture was implemented to support 100 Gb/s data processing rate. Thus, it has potential applications in next generation forward error correction schemes for 100 Gb/s long-haul optical communications.

Original languageEnglish
Title of host publication2010 International SoC Design Conference, ISOCC 2010
Pages428-431
Number of pages4
DOIs
StatePublished - 2010
Event2010 International SoC Design Conference, ISOCC 2010 - Incheon, Korea, Republic of
Duration: 22 Nov 201023 Nov 2010

Publication series

Name2010 International SoC Design Conference, ISOCC 2010

Conference

Conference2010 International SoC Design Conference, ISOCC 2010
Country/TerritoryKorea, Republic of
CityIncheon
Period22/11/1023/11/10

Keywords

  • 100G
  • BCH
  • Concatenated codes
  • Net coding gain
  • Optical communications

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